1. Field of the Invention
The present invention relates to a multilayer chip capacitor, and more particularly, to a highly reliable and smaller-sized multilayer chip capacitor in which external electrodes on opposing sides are prevented from being shorted to each other.
2. Description of the Related Art
A multilayer chip capacitor is beneficially employed as a decoupling capacitor disposed in a high-frequency circuit as a large-scale integration (LSI) power circuit. To ensure a stable power circuit, the multilayer chip capacitor should be further decreased in equivalent series inductance (ESL), and reduced in size to allow a great number of capacitors connected in parallel to be adopted. Such a demand has been rising due to a higher-frequency and higher-current trend of electronic devices.
The decoupling capacitor for use in a high-speed micro processor unit (MPU) includes a two-terminal chip capacitor and a multi-terminal multi-layer chip capacitor. Also, a three-terminal feed-through multilayer chip capacitor for use in an electromagnetic-interference (EMI) filter may be employed as the decoupling capacitor. This two-terminal, three-terminal or multi-terminal multilayer chip capacitor is increasingly required to be reduced in size and ESL, thereby potentially causing external electrodes on opposing sides to be shorted to each other.
FIG. 1A is a perspective view illustrating a conventional two-terminal low-inductance ceramic capacitor. Referring to FIG. 1A, the capacitor 10 includes a capacitor body 11 and two external electrodes 13 and 14. The capacitor body 11 has a plurality of dielectric layers deposited therein. In the capacitor body 11, a plurality of internal electrodes (not shown) are deposited alternately with the dielectric layers and connected to the external electrodes 13 and 14. The external electrodes 13 and 14 are formed on opposing sides B1 and B2.
To attain lower ESL, the external electrodes 13 and 14 may be applied on the sides B1 and B2 of a relatively broad area. The external electrodes 13 and 14, when applied on the sides B1 and B2, are extended to a top A1 of the capacitor body due to characteristics of the process. With a smaller trend of the capacitor, the external electrodes 13 and 14 on the top A1 are disposed at a shorter distance d, thus more likely to be shorted to each other. Especially, due to limitations associated with the process of applying the external electrodes, each of the external electrodes 13 and 14 is extended by a length of 0.1 to 0.2 mm on the top A1. This renders it very hard to develop a smaller two-terminal multilayer chip capacitor with a 0306 size having a width W of 0.3 mm and a length L of 0.6 mm due to a risk of short between the external electrodes on the top A1. Moreover, from a standpoint of a user, not a developer, it may be very difficult to mount the multilayer chip capacitor having the external electrodes very closely spaced from each other on a printed circuit board (PCB) since even small errors in a mounting position may trigger serious defects. These are the problems also facing the multi-terminal and three-terminal feed-through capacitors.
FIG. 1B is a perspective view illustrating a conventional multi-terminal multilayer chip capacitor. Referring to FIG. 1B, the capacitor 20 includes a capacitor body 21 and a plurality of external electrodes 23 and 24. The four external electrodes 23 and the other four electrodes 24 are disposed on opposing sides B1 and B2, respectively. In the body 21, internal electrodes (not shown) are deposited to connect to the external electrodes 23 and 24 by leads.
Lower ESL and smaller scale required for the capacitor causes the external electrodes 23 and 24 on opposing sides B1 and B2 of the top A1 of the capacitor body to be disposed at a shorter distance d′, and to be more likely to be shorted to each other. Notably, in a case where the multi-terminal capacitor 20 is reduced from a 1608 size to a 1005 size or to a 0603 size having a length L′ of 0.6 mm and a width W′ of 0.3 mmm, the external electrodes are more likely to be shorted to each other. When the external electrodes of different polarities are shorted to each other, the capacitor does not operate normally.
FIG. 1C is a perspective view illustrating a conventional three-terminal feed-through multilayer chip capacitor. Referring to FIG. 1C, the capacitor 30 includes a capacitor body 31 and external electrodes 33, 34, 35 and 36. The external electrodes 33 and 34 of one polarity are disposed on two opposing sides B1 and B2, respectively. Also, the external electrodes 35 and 36 of another polarity are disposed on other two opposing sides C1 and C2, respectively. This three-terminal capacitor may be employed as an EMI filter and a decoupling capacitor as well.
In a case where the three-terminal feed-through capacitor 30 is reduced from a 1005 size to a 0603 size having a length L″ of 0.6 mm and a width W″ of 0.3 mm, the external electrodes 33 and 34 on the top A1 are disposed at a shorter distance d″, accordingly more likely to be shorted to each other. Such short between the external electrodes 33 and 34 may degrade capacitor characteristics.